Abstract: Soon after the discovery of the quantum spin Hall effect in HgTe quantum well (QW) structures, HgTe turned out to be a prototype material for the investigations of transport properties in topological insulator (TI) materials. Further versatility has been demonstrated with the development of strain engineering. So far, the lattice parameter has been tailored by ZnTe/CdTe superlattices (SLs). Adjusting the superlattice period, tensile and compressively strained HgTe layers have been grown on the SLs resulting in 3D TIs and Weyl or Dirac semimetal states, respectively. However, the availability of appropriate substrates for strain engineering and subsequent growth of HgTe is very limited. Mostly the GaAs:Si(001) substrate has been explored for the growth of both unstrained HgTe quantum well (QW) and compressively strained bulk using ZnTe/CdTe SLs. Note that the use of a doped substrate with an insulating layer (i.e., SLs) is the possibility to integrate as a back gate. However, the obtained surface roughnesses are rather high, even for rather high SL thicknesses presumably due to the high lattice mismatch (a/a) between the substrate and HgTe which promotes islanding growth. This surface is not suitable for sub-micrometer device fabrication and measurement techniques with nanometer-scale resolution. This issue may be addressed by replacing the GaAs substrate with a substrate that provides a more suitable lattice match for example the a/a value is sufficiently decreased by using the InAs substrate. An improved interfacial crystalline quality and a decreased surface roughness may be expected. Thus, it could be potentially used in sub-micrometer/nanometer device fabrication.
We report, for the first time, that an InAs:S substrate promotes an initial two-dimensional coherent ZnTe epilayer and subsequent ZnTe/CdTe superlattices serve as a smooth and continuous virtual substrate for the growth of unstrained quantum well HgTe (topological insulator) and compressively strained bulk HgTe (Weyl semimetal) by molecular beam epitaxy. Compared with the superlattices previously grown on GaAs substrates (Cd,Hg)Te/HgTe/(Cd,Hg)Te heterostructures with the quantum well as well as bulk exhibit homogeneous surfaces with root mean square roughnesses of 0.88−0.93 nm, which is three times lower than those observed for three-dimensional HgTe islands (2.7−3.4 nm) on GaAs substrates. Additionally, magnetotransport measurements confirm high electronic quality and demonstrate that the S-doped InAs substrate can be used as an effective back gate. These results manifest a (big) step forward toward the improvement of micro- and nanometer-sized top- and back-gated device fabrication on topological materials.

Meeting ID: 973 6368 5337
Passcode: 101153